Not Applicable.
1. Field of Invention
The present invention is directed generally to methods for fabricating micromachined structures and, more particularly, to methods for fabricating micromachined structures combining bulk substrate etching with micromachining.
2. Description of Background
Microfabrication, also known as micromachining, commonly refers to the use of known semiconductor processing techniques to fabricate devices known as micro-electromechanical systems (MEMS) or micromachined devices. In general, known MEMS fabrication processes involve the sequential addition and removal of layers of material from a substrate layer through the use of film deposition and etching techniques until the desired structure has been realized. Accordingly, MEMS devices typically function under the same principles as their macroscale counterparts. MEMS devices, however, offer advantages in design, performance, and cost in comparison to their macroscale counterparts due to the decrease in scale of MEMS devices. In addition, due to batch fabrication techniques applicable to MEMS technology, significant reductions in per unit cost may be realized.
Micromachined structures are frequently used in MEMS inertial sensors, such as accelerometers and gyroscopes. A MEMS accelerometer using differential capacitors to detect acceleration typically includes three primary micromachined elements: a central, or proof, member, capacitor plates, and support springs. FIG. 21 is a top plan view of a typical prior differential capacitor-based micromachined accelerometer 100, including movable central member 102 supported by spring support beams 104. The central member 102 includes a number of fingers 108 extending perpendicularly away from the central member 102, which are interleaved with a number of fingers 110 extending perpendicularly from support beams 112. These features are formed in a cavity 116 formed in a substrate 118 through conventional etching techniques, and may be anchored to the underlying substrate 118 or cantilevered structures released from the substrate 118. The fingers 108 and 110 are typically oxide structures covered with a coating of conductive material, such as aluminum, thereby creating individual parallel-plate capacitors between each adjacent pair of the interleaved fingers 108, 110. In operation, when the accelerometer 100 is accelerated, the fingers 108 move relative to the fingers 110, thereby varying the distance, and hence the capacitance, between the fingers 108, 110. The variable capacitance can be determined by peripheral circuitry interfacing with connectors 120, which are connected to the fingers 110 via the support beams 112.
The sensitivity of such prior micromachined accelerometers 100 is dependent upon a number of factors, including the mass of the central, or proof, member 102. Generally, the greater the mass of the central member 102, the better the inertial sensing device because for a given acceleration, there will be a greater force. Thus, additional mass could be added by enlarging the central member 102, thus increasing the tendency of the central member 102 to remain motionless relative to the other components of the accelerometer 100. However, because typical prior microaccelerometers require peripheral circuitry, there is a practical limit to the available size of the central member 102 given a particular die size. Moreover, because the circuitry is peripheral, a relatively large amount of parasitic capacitance is introduced into the electrical system of the accelerometer 100, thereby degrading device sensitivity.
It is known, however, to use CMOS-micromachining processes to create microstructures that are made out of the dielectric and metallization layers in a CMOS process. According to such processes, one of the CMOS interconnect metal layers, or some other layer made from an etch-resistant mask material, acts as an etch-resistant mask for defining the microstructural sidewalls. A reactive-ion etch of the CMOS oxide layer creates composite metal/dielectric microstructures that can have a high aspect ratio of beam width to beam thickness, and of gaps between the beams to beam thickness.
There are two primary techniques to refine and release CMOS micromachined structures: wet etching and dry plasma etching. Wet etching provides the disadvantage that it generally cannot reproduce complex shaped structures with accurate dimensional control. Dry plasma etching, on the other hand, typically is free from dimensional restrictions. However, the current semiconductor-based plasma systems used for dry plasma etching have very slow etch rates, for example, below one xcexcm/min for silicon. This disadvantage is particularly acute when the CMOS microstructure is to be combined with, for example, a bulk silicon substrate, which may have a thickness between 400-500 xcexcm. In addition, the plasma systems have limited selectivities to mask materials, for example, 20-30:1 for a silicon dioxide (SiO2) mask over silicon (Si).
A known prior solution for fabricating submicron movable mechanical structures uses a chemically assisted ion beam etch (CAIBE) and a reactive ion etch (RIE). According to the process, a RIE is performed to selectively remove portions of dielectric layers formed on a substrate, such as a GaAs substrate. Next, a CAIBE is performed to selectively remove portions of the GaAs substrate to define the trenches of the structure. Subsequently, a nitride layer is deposited over the structure, including the trenches, by plasma-enhanced chemical vapor deposition (PECVD) to protect the mesa structure. After the nitride layer is formed, the portions of the nitride layer are etched back to remove the nitride layer from the bottoms of the trenches, but to retain the nitride layer on the sidewalls of the mesa structure. Next, a RIE process can be used to undercut the substrate material under the structure. This solution thus requires the deposition of materials to protect the microstructure during the etching of the substrate layer, which therefore increases production steps and consequently production costs.
Accordingly, there exists a need for a method of fabricating micromachined structures with bulk substrates according to less expensive and time-consuming fabrication processes. There also exists a need for a fabrication method requiring fewer fabrication steps.
The present invention is directed to a method for fabricating a micromachined structure. The method includes forming a circuitry layer having an upper etch-resistant layer on an upper surface of a substrate, directionally etching a portion of the circuitry layer exposed by the upper etch-resistant layer, and directionally etching a portion the substrate exposed by the upper etch-resistant layer with a deep reactive ion etch.
The present invention represents an advancement over prior methods of fabricating microelectromechanical structures in that it eliminates fabrication steps, such as deposition steps, thus realizing a reduction in fabrication time and cost. The present invention further has the advantage that it adopts existing process equipment and recipes, without having to place strict process requirements for the fabricated MEMS devices, especially etching of the substrate wafer. The present invention has the further advantage of enabling the manufacture of inexpensive, very-high performance MEMS inertial sensors and microfluidic devices. The present invention also represents an advantage in that it permits the fabrication of microstructures on micromachined bulk silicon which can include circuitry on a moving structure, thereby reducing the die area and lowering fabrication costs. The present invention has the further advantage that it permits that fabrication of micromachined devices from entirely single-sided etching without the need to use extra masks. These and other benefits of the present invention will be apparent from the detailed description of the invention hereinbelow.